Abstract Number:
2598
Submission Type:
Contributed Abstract
Contributed Abstract Type:
Poster
Participants:
Keren Kanarik (1), Sae Na Park (2)
Institutions:
(1) Lam Research, United States, (2) Lam Research, N/A
Co-Author:
First Author:
Presenting Author:
Abstract Text:
One of the bottlenecks to building semiconductor chips is the increasing cost required to develop chemical plasma processes that form the transistors and memory storage cells. These processes are still developed manually using highly trained engineers searching for a combination of tool parameters that produces an acceptable result on the silicon wafer. Here we study Bayesian optimization algorithms to investigate how artificial intelligence might decrease the cost of developing complex semiconductor chip processes. In particular, we create a controlled virtual process game to systematically benchmark the performance of humans and computers for the design of a semiconductor fabrication process. We find that human engineers excel in the early stages of development, whereas the algorithms are far more cost-efficient near the tight tolerances of the target. Furthermore, we show that a strategy using both human designers with high expertise and algorithms in a human first–computer last strategy can reduce the cost-to-target by half compared with only human designers.
Keywords:
semiconductor fabrication process|recipe optimization|Bayesian optimization|virtual process| |
Sponsors:
Section on Bayesian Statistical Science
Tracks:
Applications in Applied Sciences
Can this be considered for alternate subtype?
Yes
Are you interested in volunteering to serve as a session chair?
No
I have read and understand that JSM participants must abide by the Participant Guidelines.
Yes
I understand that JSM participants must register and pay the appropriate registration fee by June 1, 2024. The registration fee is non-refundable.
I understand